8051 DATA
TYPES AND
DIRECTIVES
Assembler
Directives
(cont’)
ORG (origin)
The ORG directive is used to indicate the
beginning of the address
The number that comes after ORG can be
either in hex and decimal
If the number is not followed by H, it is decimal
and the assembler will convert it to hex
END
This indicates to the assembler the end of
the source (asm) file
The END directive is the last line of an
8051 program
Mean that in the code anything after the END
directive is ignored by the assembler
8051 DATA
TYPES AND
DIRECTIVES
Assembler
directives
(cont’)
EQU (equate)
This is used to define a constant without
occupying a memory location
The EQU directive does not set aside
storage for a data item but associates a
constant value with a data label
When the label appears in the program, its
constant value will be substituted for the label
8051 DATA
TYPES AND
DIRECTIVES
Assembler
directives
(cont’)
EQU (equate) (cont’)
Assume that there is a constant used in
many different places in the program, and
the programmer wants to change its value
throughout
By the use of EQU, one can change it once and
the assembler will change all of its occurrences
COUNT EQU 25
... ....
MOV R3, #COUNT
Use EQU for the
counter constant
The constant is used to
load the R3 register
FLAG BITS AND
PSW REGISTER
Program Status
Word
The program status word (PSW)
register, also referred to as the flag
register, is an 8 bit register
Only 6 bits are used
These four are CY (carry), AC (auxiliary carry), P
(parity), and OV (overflow)
– They are called conditional flags, meaning
that they indicate some conditions that
resulted after an instruction was executed
The PSW3 and PSW4 are designed as RS0 and
RS1, and are used to change the bank
The two unused bits are user-definable
FLAG BITS AND
PSW REGISTER
Program Status
Word (cont’)
CY AC F0 RS1 RS0 OV -- P
CY PSW.7 Carry flag.
AC PSW.6 Auxiliary carry flag.
-- PSW.5 Available to the user for general purpose
RS1 PSW.4 Register Bank selector bit 1.
RS0 PSW.3 Register Bank selector bit 0.
OV PSW.2 Overflow flag.
-- PSW.1 User definable bit.
P PSW.0 Parity flag. Set/cleared by hardware each
instruction cycle to indicate an odd/even
number of 1 bits in the accumulator.
1 1 3 18H – 1FH
1 0 2 10H – 17H
0 1 1 08H – 0FH
0 0 0 00H – 07H
RS1 RS0 Register Bank Address
Carry out from the d7 bit
A carry from D3 to D4
Reflect the number of 1s
The result of in register A
signed number
operation is too
large, causing
the high-order
bit to overflow
into the sign bit
FLAG BITS AND
PSW REGISTER
ADD
Instruction And
PSW
CJNE X
MOV C, bit X
ORL C, /bit X
ORL C, bit X
ANL C, /bit X
ANL C, bit X
CPL C X
CLR C 0
SETB C 1
PLC X
RPC X
DA X
DIV 0 X
MUL 0 X
SUBB X X X
ADDC X X X
ADD X X X
Instruction CY OV AC
Instructions that affect flag bits
FLAG BITS AND
PSW REGISTER
ADD
Instruction And
PSW
(cont’)
Example 2-2
Show the status of the CY, AC and P flag after the addition of 38H
and 2FH in the following instructions.
MOV A, #38H
ADD A, #2FH ;after the addition A=67H, CY=0
Solution:
38 00111000
+ 2F 00101111
67 01100111
CY = 0 since there is no carry beyond the D7 bit
AC = 1 since there is a carry from the D3 to the D4 bi
P = 1 since the accumulator has an odd number of 1s (it has five 1s)
The flag bits affected by the ADD
instruction are CY, P, AC, and OV
FLAG BITS AND
PSW REGISTER
ADD
Instruction And
PSW
(cont’)
Example 2-3
Show the status of the CY, AC and P flag after the addition of 9CH
and 64H in the following instructions.
MOV A, #9CH
ADD A, #64H ;after the addition A=00H, CY=1
Solution:
9C 10011100
+ 64 01100100
100 00000000
CY = 1 since there is a carry beyond the D7 bit
AC = 1 since there is a carry from the D3 to the D4 bi
P = 0 since the accumulator has an even number of 1s (it has zero 1s)
Department of Computer Science and Information Engineering
National Cheng Kung University, TAIWAN 33 HANEL
FLAG BITS AND
PSW REGISTER
ADD
Instruction And
PSW
(cont’)
Example 2-4
Show the status of the CY, AC and P flag after the addition of 88H
and 93H in the following instructions.
MOV A, #88H
ADD A, #93H ;after the addition A=1BH, CY=1
Solution:
88 10001000
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